Content addressable memory (CAM) devices, sometimes referred to as “associative memories,” can receive a compare data value (sometimes referred to as a comparand or search key), and compare such a value against a number of stored data values. In most configurations, such an operation can match a compare data value against a very larger number of stored data values (e.g., thousands or millions), essentially simultaneously.
Such rapid compare functions have resulted in CAM devices enjoying wide application in various packet processing hardware devices, such as routers and network switches, to name just two. In a typical packet processing operation, a device can receive a packet. The packet can include a “header” having various data fields that indicate how the packet should be processed. The hardware device can use a matching function, provided by a CAM device, to compare one or more header fields to stored data values that can indicate how the packet is to be processed.
Many CAM device configurations can include a number of CAM memory cells arranged in a logical fashion (e.g., rows, words, etc.) to store data values for comparison with a search key. Such CAM memory cells typically include a storage circuit for storing one or more bit values as well as a compare circuit, for comparing the stored data value(s) with corresponding portions of a received search key.
CAM devices are typically manufactured in integrated circuit form, as stand alone memory devices, or as some portion of an integrated circuit providing other functions. For many integrated circuit applications, including those that include CAM memory cells, current draw can be an important feature. That is, it is desirable to reduce current draw in an integrated circuit to as great an extent as possible. Reductions in current draw can reduce power supply requirements, heat sinking requirements, and battery life in the case of portable applications.
To better understand various aspects of the present invention, a conventional CAM device circuit will briefly be described.
Referring now to FIG. 26, an example of a conventional CAM cell column is shown in a block schematic diagram and designated by the general reference character 2600. Conventional CAM column 2600 includes a number of CAM cells (two shown in the figure as 2602-0 and 2602-1) connected to complementary bit lines 2604-0 and 2604-1. CAM cells (2602-0 and 2602-1) can include both storage circuits and compare circuits. Data values can be written to storage circuits, or read from storage circuits via bit lines (2604-0 and 2604-1). In particular, in a write or read operation one bit line (e.g., 2604-0) can carry a data value, while the other bit line (e.g., 2604-1) can carry a complementary data value.
In many conventional CAM device configurations, sense amplifiers for reading data from a bit line pair and/or write amplifiers for writing data to a bit line pair are designed to begin sense operations with both bit lines at a predetermined precharge level (e.g., a high power supply voltage VDD). In such an arrangement, during a read operation, according to a data value stored in a read CAM cell, a sense amplifier can drive one bit line low while the other remains high. Similarly, in a write operation, a write amplifier can drive one bit line low, while the other remains high.
In order to ensure that bit lines are at an optimal level for reading or writing, a conventional CAM cell column 2600 can include “leaker” precharge transistors P260 and P261. Transistor P260 can have a source connected to a high power supply voltage VDD, a drain connected to bit line 2604-0 and a gate connected to a low power supply voltage VSS. Similarly, transistor P261 can have a source connected to a high power supply voltage VDD, a drain connected to bit line 2604-1 and a gate connected to low power supply voltage VSS. In such an arrangement, leaker transistors P260/P261 are “always on” devices, maintaining bit lines (2604-0 and 2604-1) at a VDD level. Because CAM cells (2602-0 and 2602-1) connected to bit lines (2604-0 and 2604-1) can draw some leakage current, transistors P260 and/or P261 may continuously draw some amount of current.
Another example of a CAM bit line control circuit is shown in U.S. Pat. No. 6,906,937 issued to Bindiganavale S. Nataraj on Jun. 14, 2005 (hereinafter Nataraj). Nataraj shows a bit line control circuit that adjusts the charge current for bit lines in response to a bit line control signal.